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verilog behaviral modeling -- procedural timing contronls

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1.delay control : an expression specifies the time duration between initially encountering the statement and when the statement actually executes.

                         the delay expressiong can be dynamic function of the state of the circuit,but it can be a simple number that separates statement

                         executions in time.

2.event control: which allows statement execution to be delayed until the occurence of some simulation event occurring in a procedure executing 

                         concurrently with this procedure.

                         a simulation event can be a change of value on a net or variable(an implicit event) or the occurrence of an explicity named event

                         that is triggered from other procedures(an explicit event).

                        most often , an event control is p positive or negative edge on a clock signal.


 

Simulation time can advance by one of the following three methods:

                      1.a delay control   ----> introduced by the symbol #

                      2.an event control  -----> introduced by the symbol @

                      3.the wait statement ----> operates like a combination of the event control and the while loop

 


 

 

verilog behaviral modeling -- procedural timing contronls

原文:http://www.cnblogs.com/chip/p/4100249.html

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